In today's rapidly growing world of fast, low-power digital signal processing (DSP), increasingly more analog signals are processed in the digital domain through the use of analog-to-digital converters (ADDs), thereby expanding the need for good analog filter design. For example, anti-alias filters are often used in mixed signal circuits to reduce effects of signals that, if present, will fold back into the frequency band of interest due to the sampling effect.
Selection of filter architectures typically depends on a final application; in many applications, Gm-C filter design has focused on improving linearity, without regard for reduction in noise or power consumption.
Further, conventionally there is no suitable mechanism for outputting clock signals with sufficient pulse width (e.g., to allow for a switch to be closed for a required amount of time) while allowing for fast switching, where power consumption is a consideration. More specifically, in conventional systems, separate clocks are often used to control separate switches (e.g., when it is required that the switches are not closed at the same time), which consumes energy. This can become particularly problematic if numerous switches are to be controlled.